Position : Senior FPGA Design Engineer
Location : US – MD, Fort Meade (or surrounding area)
Category : Hardware
Clearance Requirement : Active TS/SCI w/ full scope polygraph
Education Requirement : BS in Electrical or Computer Engineering (or related technical field)
Experience Requirement : 7 Years
TAP is seeking to hire a Senior FPGA Design Engineer to join our team! If you are a highly motivated engineer who enjoys a challenging and dynamic environment where your contributions are both critical and valued, this company will provide you the tools and opportunity to thrive.
The Senior FPGA Design Engineer will focus on FPGA Design, PCB design and layout, and reverse engineering, to include the analysis of integrated circuits for security, at both the macrocell/digital level, and the transistor/analog level.
Required Qualifications:
Desired Qualifications:
**This position is contingent upon the successful completion of security processing and favorable acceptance onto the program by the Customer.**
Clearance Requirement : This position requires ability to obtain and maintain a Top Secret/SCI security clearance, based on current background investigation (SBI), as well as the favorable completion of full scope polygraph. Clearance and polygraph processing will be completed by the U.S. Government. Factors considered for a U.S. Government Security Clearance include, but are not limited to:
By submitting your resume for this position, you understand and agree that TAP Engineering may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
TAP Engineering is an Equal Opportunity Employer and applicants receive lawful consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.
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